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Volume & Issue no: Volume 5, Issue 2, February 2016

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Title:
ADAPTIVE HEARING AID ALGORITHM USING DIFFERENT TYPES OF MULTIPLIER
Author Name:
M. Aravindkumar, P. Sivananthamaitrey , K. Rameshchandra
Abstract:
ABSTRACT Approximately ten percentage of the world’s population suffers from some type of hearing loss, yet only few percentage of people use the hearing aid. The problems associated with wearing a hearing aid, customer dissatisfaction with the hearing aid, the cost and the battery life time. Through the use of digital signal processing the digital hearing aid. In this paper flexibility of gain processing, updating filter coefficients using adaptive techniques and digital feed back reduction, etc. Currently lot of importance is being given to low power VLSI design issues. Major focus in this paper is given to the impact of multipliers on the power consumption of digital hearing aids. At first booth multiplier and booth Wallace multipliers are designed. The multiplier which consumes less power is taken for designing hearing aid component. The implementation of the Hearing Aid system includes spectral sharpening for enhancement of speech signal and spectral sharpening for reduction of noise. A fundamental building block, an adaptive filter, analysis of the filter, synthesis filter are implemented using Booth multiplier and Wallace multiplier. The simulation of the hearing aid is done both in MATLAB and VHDL. The results from MATLAB and VHDL are compared. The hearing aid is constructed, targeting FPGA. Using the synthesis report and the power calculation report we compare the relative power consumption of the adaptive decorrelator, filter analysis and filter synthesis for these multipliers. The results show that the reduction in power consumption by using Booth Wallace multiplier and also - that using this speed of the multiplier is increased. However, since the total power consumption is dominated by the FIR, IIR lattice filters, and the total power saving depends on the order of the filter. The hearing aid component is designed in VHDL and implemented in FPGA(VIRTEXIIPRO) kit. Keywords: Array multiplier, parallel multiplier, propagat ion delay, LUT, utilization and twiddle f actors.
Cite this article:
M. Aravindkumar, P. Sivananthamaitrey , K. Rameshchandra , " ADAPTIVE HEARING AID ALGORITHM USING DIFFERENT TYPES OF MULTIPLIER " , International Journal of Application or Innovation in Engineering & Management (IJAIEM) , Volume 5, Issue 2, February 2016 , pp. 148-156 , ISSN 2319 - 4847.
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