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Title: Comparsion of Performance Parameters of CNTFET Based 3Value Logic Memory cell and CNTFET Based 6T SRAM Using HSPICE

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Title:
Comparsion of Performance Parameters of CNTFET Based 3Value Logic Memory cell and CNTFET Based 6T SRAM Using HSPICE
Author Name:
S.Tamil Selvan
Abstract:
This paper presents a design of a 3ValueLogic memory cell using carbon nano-tube field-effect transistors (CNTFETs). 3VL is a promising alternative to conventional binary logic, as it has better performance in terms of low power and also reduces propagation delay. This cell uses a control gate for the write and read operation to make them separate. Transmission gate is used as control gate in this circuit. The CNTFET used for design has different threshold voltages to achieve ternary logic. This multi threshold voltage is obtained by varying the diameter of the CNT used. Chirality of the CNTFETs is utilized for varying the diameter of the CNT and it also avoids the usage of additional power supplies. The channel length used here is 32nm wide. The power consumption is reduced as there is absence of stand-by power dissipation. Second order effects are removed by using CNTFET in the circuit. The two memory operations, bit read and bit write operation of the 3ValueLogic cell perform correctly at 0.9V power supply. In a3Value Logic, it only takes log3 (2n) bits to represent an n-bit binary number. The various performance parameters of 3VL memory cell and 6T SRAM CNTFET measured using HSPICE.
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