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Volume & Issue no: Volume 6, Issue 6, June 2017

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Title:
Synthesis of Quantum Circuit for FULL ADDER Using KHAN Gate
Author Name:
MADHUMITA MAZUMDER
Abstract:
ABSTRACT Reversible and Quantum logic circuits have more advantages than the common circuits, like low power consumption. To design future computers these circuits are good choice for us. In reversible logic circuit, parity preservation is very important issue. Parity Preserve of a reversible gate means, parity of inputs and outputs of the gate are equal. Reversible circuits made by these gates are also parity preserve. Quantum Gate is the primary gate level element for construction of quantum computer that perform the computation. Khan Gate (NG) is the 3*3 parity preserving reversible gate. In this work, Khan Gate is implemented using quantum gate CNOT, NOT, positive and negative controlled Toffoli gate and Swap gate. This implementation is used for construction of Full Adder quantum circuit using Quantum Representation of Khan gate Gate. Keywords: Classical Circuit, Quantum computing, Quantum Circuit, Reversible Logic, Reversible Gates.
Cite this article:
MADHUMITA MAZUMDER , " Synthesis of Quantum Circuit for FULL ADDER Using KHAN Gate " , International Journal of Application or Innovation in Engineering & Management (IJAIEM) , Volume 6, Issue 6, June 2017 , pp. 226-232 , ISSN 2319 - 4847.
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